1. Field of the Invention
This invention relates to circuits and methods for employing non-volatile memory to transform digital and analog signals and to circuits and methods for encrypting or scrambling and decrypting or descrambling digital and analog signals.
2. Description of Related Art
Limiting access to confidential or proprietary information is critical to maintain the privacy or commercial value of the information. Accordingly, many systems have been developed to prevent unauthorized use of information. For example, smart cards, which are in worldwide use, include integrated circuits that contain financial information and require security systems to limit access or use of the information. Commercial television broadcast systems often transmit signals via cable or air waves for the use of those paying for the transmission but also want to prevent others from using the transmission. Communications via the internet, radio, cellular telephones, and telephone lines have a variety of security concern that arise from possible unauthorized interception and use of transmitted information. Accordingly, users often want to protect their communications from unauthorized interception.
A common method for protecting confidential information is to encrypt data or scramble signals that convey the information. Ideally, the encrypted data or scrambled signals convey no usable information to unauthorized recipients, but authorized recipients having the appropriate facility to convert the encrypted data or scrambled signals can decode and use the information. Sometimes the conversion facility consists of a password or key and appropriate software and/or hardware for converting encrypted data or scrambled signal to a usable form. To improve security, the facility of converting the protected information should be difficult or impossible to reverse engineer or duplicate without authorization.
In accordance with the invention, a scrambling or encryption method involves analog-to-digital, digital-to-analog, analog-to-analog, or digital-to-digital conversions that are constructed from one or more conversions, each conversion including an analog-to-digital conversion or a digital-to-analog conversion. Specifically, encryption of an analog signal converts the analog signal to an encrypted digital signal that can be transmitted or converted into an encrypted analog signal. Encryption of a digital signal converts the digital signal to an encrypted analog signal that can be transmitted or converted into an encrypted digital signal. The conversions between analog form and digital form and back can be repeated as many times as desired until a desired encrypted signal is ready and transmitted. Performing the inverse conversions in reverse order reconstructs the original analog signal.
A codec for scrambling/descrambling and encryption/decryption implements two or more different analog-to-digital conversions and two or more digital-to-analog conversions. One embodiment of the codec includes a programmable data conversion array that includes an array of transistors such as floating gate transistors in memory cells. Input circuitry applies an analog signal to gates of the transistors during an analog-to-digital conversion, and an encoder that generates an output digital value according to which transistor or transistors along a row line conduct while the analog signal is applied to the row line. For a digital-to-analog conversion, a read circuit reads the threshold voltage of a transistor identified by a selected digital value to generate an analog voltage that corresponds to the selected digital value. A selection circuit for the converter can route the digital output signal from the encoder to select a transistor to be read and can route the analog output signal from the read circuit to the input circuitry. Accordingly, output values can be routed through the converter once or multiple times.
In accordance with one embodiment of the invention, a converter for a scrambling or encryption system includes an array of transistors such as floating gate transistors and an analog read circuit coupled to the array during a first operation, e.g., a digital-to-analog conversion. The analog read circuit has an output terminal for an analog output signal representing a threshold voltage of a transistor identified by a selected digital signal during the first operation. A first select circuit selects a gate bias signal, selects a set of transistors in the array, and applies the selected gate bias signal to gates of transistors in the selected set. During a second operation, e.g., an analog-to-digital conversion, the first select circuit selects the analog output signal or an analog input signal as the selected gate bias signal. An encoder coupled to the array generates a multibit digital output signal that represents a digital output value that depends on which transistor or transistors in the selected set conduct during the second operation. A second select circuit generates the selected address signal, the selected address signal being dependent on the digital output signal or the digital input signal. In an exemplary embodiment, the first select circuit includes a row decode for the array and multiplexers for selecting the row bias signal, and the second select circuit includes a column decoder and mixing circuits that generate the address signal. The array typically includes multiple sets of transistors, each having a different sequence of threshold voltages that defines an analog-to-digital conversion and a digital-to-analog conversion that is the inverse of the analog-to-digital conversion. Each encryption involving two or more passes through the array requires at least two different sets of transistors that define different conversions.
One method for scrambling an analog signal or encrypting a digital signal includes converting the signal (analog or digital) to an intermediate signal of the opposite form using a first conversion and converting the intermediate signal back using a second conversion that is not the inverse of the first conversion. Since the second conversion is not the inverse of the first conversion, the resulting signal is an encoded (i.e., scrambled or encrypted) signal. The encoded signal can be transmitted to a receiver for decoding (i.e., descrambling or decryption.) In the decoding process, the receiver converts the encoded signal to an intermediate signal using a third conversion and converts that intermediate signal to a decoded signal using a fourth conversion. The third conversion is the inverse of the second conversion, and the fourth conversion is the inverse of the first conversion. The decoding may include decoding a key to identify which of a plurality of analog-to-digital conversions and a plurality of digital-to-analog conversions are the third and fourth conversions.
A more complex process for encrypting an analog signal includes: (a) electing the analog signal as an input analog signal; (b) selecting an analog-to-digital conversion from a plurality of analog-to-digital conversions; (c) converting the input analog signal to an intermediate digital signal using the analog-to-digital conversion last selected in step (b); (d) selecting a digital-to-analog conversion from a plurality of digital-to-analog conversions; and (e) converting the intermediate digital signal into a scrambled analog signal using the digital-to-analog conversion last selected in step (d). Steps (b) through (f) can be repeated one or more times, each time selecting the scrambled analog signal as the input analog signal. A decryption process selects an analog-to-digital conversion from the plurality of analog-to-digital conversions, converts a received input signal to an intermediate digital signal using the analog-to-digital conversion last selected, selects a digital-to-analog conversion from the plurality of digital-to-analog conversions, and converts the intermediate digital signal into an intermediate analog signal using the digital-to-analog conversion last selected. Paired conversions, each including a digital-to-analog conversion and an analog-to-digital conversion, are repeated as in the encryption method. A key or password can identify conversions selected for either coding or decoding.
Encryption and decryption processes for digital signals can be performed in a similar fashion except the encryption and decryption processes select and use digital-to-analog conversions in place of analog-to-digital conversions and selects and uses analog-to-digital conversions in place of digital-to-analog conversions.
Using conversion arrays with floating gate transistors that are programmed for the required conversions makes reverse engineering of encoders or decoders very difficult because information critical to the encryption or decryption process depends on the charges on floating gates. Disassembling a converter would disturb the charge making charge measurement difficult or impossible. Further, since the encryption and decryption processes can be implemented using erasable and programmable memory cells, conversions and the associated encryption and decryption processes can be changed if necessary. For example, encoders and decoders can be changed or up-dated on-the-fly and from a remote location. This adds additional levels of security.